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Texas Instruments /MSP432P401R /DMA /DMA_INT0_CLRFLG

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Interpret as DMA_INT0_CLRFLG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CH0)CH0 0 (CH1)CH1 0 (CH2)CH2 0 (CH3)CH3 0 (CH4)CH4 0 (CH5)CH5 0 (CH6)CH6 0 (CH7)CH7 0 (CH8)CH8 0 (CH9)CH9 0 (CH10)CH10 0 (CH11)CH11 0 (CH12)CH12 0 (CH13)CH13 0 (CH14)CH14 0 (CH15)CH15 0 (CH16)CH16 0 (CH17)CH17 0 (CH18)CH18 0 (CH19)CH19 0 (CH20)CH20 0 (CH21)CH21 0 (CH22)CH22 0 (CH23)CH23 0 (CH24)CH24 0 (CH25)CH25 0 (CH26)CH26 0 (CH27)CH27 0 (CH28)CH28 0 (CH29)CH29 0 (CH30)CH30 0 (CH31)CH31

Description

Interrupt 0 Source Channel Clear Flag Register

Fields

CH0

Clear corresponding DMA_INT0_SRCFLG_REG
CH1

Clear corresponding DMA_INT0_SRCFLG_REG
CH2

Clear corresponding DMA_INT0_SRCFLG_REG
CH3

Clear corresponding DMA_INT0_SRCFLG_REG
CH4

Clear corresponding DMA_INT0_SRCFLG_REG
CH5

Clear corresponding DMA_INT0_SRCFLG_REG
CH6

Clear corresponding DMA_INT0_SRCFLG_REG
CH7

Clear corresponding DMA_INT0_SRCFLG_REG
CH8

Clear corresponding DMA_INT0_SRCFLG_REG
CH9

Clear corresponding DMA_INT0_SRCFLG_REG
CH10

Clear corresponding DMA_INT0_SRCFLG_REG
CH11

Clear corresponding DMA_INT0_SRCFLG_REG
CH12

Clear corresponding DMA_INT0_SRCFLG_REG
CH13

Clear corresponding DMA_INT0_SRCFLG_REG
CH14

Clear corresponding DMA_INT0_SRCFLG_REG
CH15

Clear corresponding DMA_INT0_SRCFLG_REG
CH16

Clear corresponding DMA_INT0_SRCFLG_REG
CH17

Clear corresponding DMA_INT0_SRCFLG_REG
CH18

Clear corresponding DMA_INT0_SRCFLG_REG
CH19

Clear corresponding DMA_INT0_SRCFLG_REG
CH20

Clear corresponding DMA_INT0_SRCFLG_REG
CH21

Clear corresponding DMA_INT0_SRCFLG_REG
CH22

Clear corresponding DMA_INT0_SRCFLG_REG
CH23

Clear corresponding DMA_INT0_SRCFLG_REG
CH24

Clear corresponding DMA_INT0_SRCFLG_REG
CH25

Clear corresponding DMA_INT0_SRCFLG_REG
CH26

Clear corresponding DMA_INT0_SRCFLG_REG
CH27

Clear corresponding DMA_INT0_SRCFLG_REG
CH28

Clear corresponding DMA_INT0_SRCFLG_REG
CH29

Clear corresponding DMA_INT0_SRCFLG_REG
CH30

Clear corresponding DMA_INT0_SRCFLG_REG
CH31

Clear corresponding DMA_INT0_SRCFLG_REG

Links

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Register License

Copyright © 2012-2018 Texas Instruments Incorporated - http://www.ti.com/

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.

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Neither the name of Texas Instruments Incorporated nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data